As the field of signal processing evolves towards high-speed and large bandwidth, signal integrity issues such as crosstalk, distortion, and ringing, manifested in the interconnection link between controllers and loads, are becoming increasingly prominent. This paper proposes a novel FLY-BY topology using PCB as a signal carrier based on DDR4, which effectively mitigates the non-ideal effects of multi-load chips and abrupt impedance changes in transmission links, increases the level margin of both signal transmitting and receiving ends, and provides an effective means for the design of Multi load interconnection on higher speed and higher complexity circuits.